#  $@: the target filename.
#  $*: the target filename without the file extension.
#  $<: the first prerequisite filename.
#  $^: the filenames of all the prerequisites, separated by spaces, discard duplicates.
#  $+: similar to $^, but includes duplicates.
#  $?: the names of all prerequisites that are newer than the target, separated by spaces.

CC      = g++
CFLAGS  = -Wall -O2 -std=c++11
SRC     = ../../src/spears
IDIR	= $(SRC)/

OBJS	= \
  naive-renderer.o \
  octreescene.o \
  tilescene.o \

# for Windows
LINK_TARGET	= spears.dll
# for Linux
#LINK_TARGET = spears.so

REBUILDABLES = $(OBJS) $(LINK_TARGET)

clean :
	rm -f $(REBUILDABLES)
	echo CLEAN done.
	
all : $(LINK_TARGET)
	echo BUILD ALL done.

# Here is a Rule that uses some built-in Make Macros in its command:
# $@ expands to the rule's target;
# $^ expands to the rule's dependencies.
$(LINK_TARGET) : $(OBJS)
	g++ -o $@ $^

# Here is a Pattern Rule, often used for compile-line.
# It says how to create a file with a .o suffix, given a file with a .cpp suffix.
# The rule's command uses some built-in Make Macros:
# $@ for the pattern-matched target
# $< for the pattern-matched dependency
%.o : %.cpp
	$(CC) $(CFLAGS) -o $@ -c $<
	
	
naive-renderer.o : \
$(SRC)/renderers/naive-renderer.cpp \
$(SRC)/renderers/naive-renderer.h
	$(CC) $(CFLAGS) -c \
	$(SRC)/renderers/naive-renderer.cpp
	
octreescene.o : \
$(SRC)/scenes/octreescene.cpp \
$(SRC)/scenes/octreescene.h

tilescene.o : \
$(SRC)/scenes/tilescene.cpp \
$(SRC)/scenes/tilescene.h
#	$(CC) $(CFLAGS) -c \
#	$(SRC)/$(SRC)/scenes/octreescene.cpp \
#	$(SRC)/scenes/tilescene.cpp